| System Features |
| 1 |
1.25KW OTP program memory |
| 2 |
80 Bytes data RAM |
| 3 |
One hardware 16-bit timer |
| 4 |
One hardware 8-bit timers with 6/7/8-bit PWM generators |
| 5 |
One set triple 11-bit SuLED(Super LED) PWM generator and timers |
| 6 |
One hardware comparator |
| 7 |
14 IO pins and optional pull-high resistor |
| 8 |
Three different IO driving capability groups to meet different application requirement |
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(1)PB3, PB5, PB7 Drive/ Sink Current= 7mA/25.5mA |
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(2)Other IOs (except PA5) Drive/ Sink Current = 7mA/14mA |
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(3)PA5 Sink Current = 12.6mA |
| 9 |
Every IO pin can be configured to enable wake-up function |
| 10 |
Clock sources: IHRC,ILRC & EOSC(XTAL mode, Reserved) |
| 11 |
For every wake-up enabled IO, two optional wake-up speed are supported: normal and fast |
| 12 |
Eight levels of LVR： 4.0V,3.5V,3.0V,2.7V,2.5V,2.2V,2.0V,1.8V |
| 13 |
Two selective external interrupt pins：PA0/ PB5，PB0/ PA4 |
| 14 |
Band-gap circuit to provide 1.20V reference voltage |
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| CPU Features |
| 1 |
One processing unit operating mode |
| 2 |
86 powerful instructions |
| 3 |
Most instructions are 1T execution cycle |
| 4 |
Programmable stack pointer to provide adjustable stack level |
| 5 |
Direct and indirect addressing modes for data access. Data memories are available for use as an index pointer of Indirect addressing mode |
| 6 |
IO space and memory space are independent |
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