| System Features |
| 1. |
2KW OTP program memory |
| 2. |
128 Bytes data RAM |
| 3. |
One hardware 16-bit timer |
| 4. |
Two hardware 8-bit timer with PWM generator |
| 5. |
Three hardware 11-bit PWM generator |
| 6. |
Provide one hardware comparator |
| 7. |
Provide 1T 8x8 hardware multiplier |
| 8. |
14 IO pins and optional pull-high resistor |
| 9. |
Every IO pin can be configured to enable wake-up function u |
| 10. |
Band-gap circuit to provide 1.20V reference voltage |
| 11. |
Up to 12-channel 12-bit resolution ADC with one channel comes from internal band-gap reference voltage or 0.25*VDD |
| 12. |
Provide ADC reference high voltage: external input, internal VDD, Band-gap(1.20V), 4V, 3V, 2V |
| 13. |
Clock sources: internal high RC oscillator, internal low RC oscillator and external crystal oscillator u |
| 14. |
For every wake-up enabled IO, two optional wake-up speed are supported: normal and fast |
| 15. |
Eight levels of LVR reset： 4.0V, 3.5V, 3.0V, 2.75V, 2.5V, 2.2V, 2.0V, 1.8V |
| 16. |
Four selectable external interrupt pins |
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| CPU Features |
| 1. |
One processing unit operating mode |
| 2. |
87 powerful instructions |
| 3. |
Most instructions are 1T execution cycle |
| 4. |
Programmable stack pointer and adjustable stack level |
| 5. |
Direct and indirect addressing modes for data access. Data memories are available for use as an index pointer of Indirect addressing mode |
| 6. |
IO space and memory space are independent |