| System Features |
| 1. |
One hardware 16-bit timer |
| 2. |
Two hardware 8-bit timers with PWM generation |
| 3. |
Three hardware 11-bit PWM generators (PWMG0, PWMG1 & PWMG2) |
| 4. |
Band-gap circuit to provide 1.20V reference voltage |
| 5. |
Up to 13-channel 12-bit resolution ADC with one channel comes from internal band-gap reference voltage or 0.375*VDD |
| 6. |
ADC reference high voltage: external input, internal VDD, Band-gap 1.20V, 2.2V, 2.4V, 2.68V |
| 7. |
Max. 18 IO pins with optional pull-high & pull-low resistor |
| 8. |
18 IO pins Driving capability, Drive current = 30 / 60mA (Strong) and Sink current = 20mA |
| 9. |
Every IO pin can be configured to enable wake-up function |
| 10. |
Built-in VDD/2 LCD bias voltage generator to provide maximum 4x9 dots LCD display |
| 11. |
Clock sources: IHRC, ILRC |
| 12. |
One low-power clock (NILRC) wake-up stopsys regularly. |
| 13. |
For every wake-up enabled IO, two optional wake-up speed are supported: normal and fast |
| 14. |
LVR range: 1.8V ~4.5V |
| 15. |
External interrupt pins by code option |
| 16. |
VCC input range: 4.3V ~ 20V |
| 17. |
Programmable Charge Current Up to 500mA |
| 18. |
Provide CC/CV operation with Thermal Regulation to Maximize Charge Rate Without Risk of Overheating |
| 19. |
Sense has two main functions: Microphone Capacitor Sense (MCS) and Heating Resistor Sense (HRS) |
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1. MCS supports capacitance range from 10pF to 24pF, and |
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a. Typical detection noise = 21 LSB when Cm = 10pF |
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b. Typical detection noise = 22 LSB when Cm = 24pF |
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2. MCS supports MEMS-capacitor, and |
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a. Typical detection noise = 20 LSB when CMEMS-capacitor = 1.4pF |
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3. HRS supports resistor range from 0.5Ω to 1.5Ω, and 0.1Ω resistor variation detection |
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| CPU Features |
| 1. |
8bit high performance RISC CPU |
| 2. |
93 powerful instructions |
| 3. |
Most instructions are 1T execution cycle |
| 4. |
Programmable stack pointer to provide adjustable stack level |
| 5. |
Direct and indirect addressing modes for data access. Data memories are available for use as an index pointer of Indirect addressing mode |
| 6. |
IO space and memory space are independent |
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